![]() This sequence is maintained even when only one-directional data transfer is intended. The main sends a bit on the MOSI line while the sub sends a bit on the MISO line, and then each reads their corresponding incoming bit. ĭuring each SPI clock cycle, full-duplex transmission of a single bit occurs. If a waiting period is required, such as for an analog-to-digital conversion, the main must wait for at least that period of time before issuing clock cycles. (Note: the bar above CS indicates it is an active low signal, so a low voltage means "selected", while a high voltage means "not selected") To begin communication, the SPI main first selects a sub device by pulling its CS low. Subs without tri-state outputs cannot share a MISO wire with other subs without using an external tri-state buffer. Sub devices should use tri-state outputs so their MISO signal becomes high impedance ( electrically disconnected) when the device is not selected. SPI operates with a single device acting as main and with one or more sub devices. CS : Chip Select ( active low signal from main to address subs and initiate transmission).MISO : Main In Sub Out (data output from sub).MOSI : Main Out Sub In (data output from main).SCLK : Serial Clock ( clock signal from main). ![]() SPI has four logic signals (which go by alternative namings): ![]() Each device internally uses a shift register for serial communication, which together forms an inter-chip circular buffer. (Note: Variations section describes operation of non-standard variants.) Figure 1: Basic SPI configuration using a single main and a single sub. SPI may be accurately described as a synchronous serial interface, but it is different from the Synchronous Serial Interface (SSI) protocol. Typical applications include interfacing microcontrollers with peripheral chips for Secure Digital cards, liquid crystal displays, analog-to-digital and digital-to-analog converters, flash and EEPROM memory, and various communication chips. It is sometimes called a four-wire serial bus to contrast with three-wire variants which are half duplex, and with the two-wire I☬ and 1-Wire serial buses. Motorola's original specification uses four wires to perform full duplex communication. SPI uses a main–subnode architecture, where one main device orchestrates communication by providing the clock signal and chip select signal(s) which control any number of subservient peripherals. Serial Peripheral Interface ( SPI) is a de facto standard (with many variants) for synchronous serial communication, used primarily in embedded systems for short-distance wired communication between integrated circuits. This article may need to be rewritten to comply with Wikipedia's quality standards, as it reads like a guide or textbook.
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